Current processes and technologies for thermal leadless array (TLA) packages yields structural features in which die attach pads (DAP) are only partially embedded in the molding compound to serve as a mechanical locking feature to counter thermal and mechanical stresses due to CTE (coefficient of thermal expansion) mismatches between the various components within the package. Typically, the shear stress between the various components can result in failure during environmental stressing or board level reliability testing. This is especially true for packages with a big die-to-DAP area ratio (typically 85% or greater). An existing process of forming TLA packages is disclosed in U.S. Pat. No. 7,049,177 to Fan et al. Fan teaches a process of forming TLA packages that involves double half etch steps. However, this process has deficiencies due to the fact that both the DAP and contacts are only partly embedded in the molding compound for mechanical locking FIG. 1 illustrates a side view of a multi-row leadless package in the prior art. The prior art semiconductor package 100 includes a die attach pad 105, contacts 110, an IC chip 115 mounted on the die attach pad 105, and wirebonds 125 bonding the chip 115 to the contacts 110. Molding compound 120 encapsulates the wirebonds 125 and the IC chip 115. The contacts 110 and the die attach pad 105 are not fully embedded in and are protruding from the bottom of the molding compound 120. When compared to a standard QFN package where the contacts and DAP are fully embedded (only a single face is exposed for connection and thermal transfer), TLA's reliability performance is less robust.
One solution is disclosed in U.S. Pat. No. 6,498,099 to McLellan et al. McLellan teaches metal buildup on a sacrificial carrier. The sacrificial carrier which is then etched away after encapsulation. The method used during buildup results in the DAP and leads having mushroom shape profile as a locking feature. However, the metal build-up process takes a long time and is therefore not price-competitive.
Other solutions are described in U.S. Pat. No. 7,033,517 to Fan et al. and U.S. Pat. No. 7,247,526 to Fan et al. In these documents, two metal foils (namely, a leadframe strip and a carrier strip) are laminated together and subsequently separated after encapsulation. The leadframe strip is first patterned and half etched on one surface prior to laminating the same surface onto the carrier strip. The non-patterned side of the leadframe strip is patterned and etched to fully define the individual I/O leads and DAP. After assembly and encapsulation, the carrier strip is removed using a heated process. The resulting structure has a fully embedded DAP but does not provide stand-off leads like TLA to facilitate soldering and mounting to a PCB.
Further, a drawback arises with a standard single row QFN package having embedded tie bars that extend from the DAP to the four corner contact pads of the package leadframe. Typically, these tie bars are left behind after the assembly process. Unfortunately, these tie bars that are left behind after the assembly process take up valuable footprint space. FIG. 4 illustrates a bottom view of the single row leadless package in the prior art. As shown, there are 32 contacts that surrounds a die attach pad 415, with eight contacts 405 exposed at the side. However, valuable footprint space at the corners 410 of the package 400 remain unused.
The present invention addresses at least these limitations in the prior art.